Addressing mode COA
| Q1➡ | Consider the C struct defined below: struct data { int marks [100]; char grade; int cnumber; }; struct data student; The base address of student is available in register R1. The field student.grade can be accessed efficiently using |
| i ➥ Post-increment addressing mode, (R1)+ |
| ii ➥ Pre-decrement addressing mode, -(R1) |
| iii ➥ Register direct addressing mode, R1 |
| iv ➥ Index addressing mode, X(R1), where X is an offset represented in 2’s complement 16-bit representation |
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| Q2➡ | Which of the following is/are true of the auto-increment addressing mode? I. It is useful in creating self-relocating code II. If it is included in an Instruction Set Architecture, then an additional ALU is required for effective address calculation III. The amount of increment depends on the size of the data item accessed |
| i ➥ I only |
| ii ➥ II only |
| iii ➥ III Only |
| iv ➥ II and III only |
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| Q3➡ | Which of the following addressing modes are suitable for program relocation at run time? (i) Absolute addressing (ii) Based addressing (iii) Relative addressing (iv) Indirect addressing |
| i ➥ (i) and (iv) |
| ii ➥ (i) and (ii) |
| iii ➥ (ii) and (iii) |
| iv ➥ (i), (ii) and (iv) |
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| Q4➡ | In the absolute addressing mode |
| i ➥ the operand is inside the instruction |
| ii ➥ the address of the operand is inside the instruction |
| iii ➥ the register containing the address of the operand is specified inside the instruction |
| iv ➥ the location of the operand is implicit |
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| Q5➡ | Which of the following addressing modes permits relocation without any change whatsoever in the code? |
| i ➥ PC relative addressing |
| ii ➥ Base register addressing |
| iii ➥ Indirect addressing |
| iv ➥ Indexed addressing |
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| Q6➡ | Which of the following statements about relative addressing mode is FALSE? |
| i ➥ It allows indexing of array elements with same instruction |
| ii ➥ It enables faster address calculations than absolute addressing |
| iii ➥ It enables easy relocation of data |
| iv ➥ It enables reduced instruction size |
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| Q7➡ | The most appropriate matching for the following pairs :  |
| i ➥ X − 3, Y − 2, Z −1 |
| ii ➥ X − 2, Y − 3, Z −1 |
| iii ➥ X − 3, Y −1, Z – 2 |
| iv ➥ X − 2, Y −1, Z – 3 |
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| Q8➡ | In which addressing mode, the effective address of the operand is generated by adding a constant value to the content of a register? |
| i ➥ Immediate mode |
| ii ➥ Index mode |
| iii ➥ Absolute mode |
| iv ➥ Indirect mode |
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| Q9➡ | The Register or main memory location which contains the effective address of the operand is known as : |
| i ➥ Scratch Pad |
| ii ➥ Special Locations |
| iii ➥ Pointer |
| iv ➥ Indexed register |
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| Q10➡ | In which addressing mode the operand is given explicitly in the instruction itself ? |
| i ➥ Index mode |
| ii ➥ Absolute mode |
| iii ➥ Indirect mode |
| iv ➥ Immediate mode |
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| Q11➡ | In the indirect addressing scheme, the second part of an instruction contains : |
| i ➥ the operand in decimal form |
| ii ➥ the address of the location where the address of the operand is stored |
| iii ➥ the address of the location where the value of the operand is stored |
| iv ➥ the operand in an encoded form |
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| Q12➡ | Match the following :  |
| i ➥ a-(iv), b-(iii), c-(i), d-(ii) |
| ii ➥ a-(iv), b-(i), c-(iii), d-(ii) |
| iii ➥ a-(iv), b-(ii), c-(i), d-(iii) |
| iv ➥ a-(iv), b-(iii), c-(ii), d-(i) |
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| Q13➡ | The________addressing mode is similar to register indirect addressing mode, except that an offset is added to the contents of the register. The offset and register are specified in the instruction. |
| i ➥ Base indexed |
| ii ➥ Displacement |
| iii ➥ Base indexed plus displacement |
| iv ➥ Indexed |
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| Q14➡ | The immediate addressing mode can be used for Loading internal registers with initial values Perform arithmetic or logical operations on data contained in instructions Which of the following is true? |
| i ➥ Only 1 |
| ii ➥ Only 2 |
| iii ➥ Both 1 and 2 |
| iv ➥ None of the above |
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| Q15➡ | In the following addressing mode, which of them performs better for accessing array? |
| i ➥ Displacement addressing mode |
| ii ➥ Index addressing mode |
| iii ➥ Direct addressing mode |
| iv ➥ Register addressing mode |
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